The present invention relates generally to communications networks, and, more particularly, to a radio-frequency (RF) transceiver for a communications network.
A communications network includes multiple transmitters, receivers, and repeaters for exchanging information. To facilitate communications between transmitters and receivers separated by long distances, RF signals are used to carry the information between the transmitters and receivers. An RF communications network includes multiple mobile switching centers (MSCs), home location registers (HLRs), base station controllers (BSSs), base transceiver stations (BTSs), and user equipments (UEs). Terms such as MSC, BSS, BTS, and UE are technology standard specific and in this case are used in the Global System for Mobile communication (GSM) standard of wireless communication. The GSM BTS corresponds to Node-B in the third generation (3G) and eNode-B in the fourth generation (4G) wireless communication standards. The BTS facilitates communications between multiple UEs. The BTS includes an RF transceiver for transmitting and receiving RF signals to and from the UEs. The RF transceiver modulates a carrier wave by changing at least one of the characteristics of the carrier wave, viz. amplitude and frequency. The RF transceiver transmits the modulated carrier wave by way of an antenna.
FIG. 1 illustrates a conventional RF transceiver system 100. The RF transceiver system 100 includes an RF transceiver 102. The RF transceiver 102 includes a baseband processing unit 104, an RF integrated circuit (RFIC) 106, and a power amplifier (PA) 108. The RF transceiver system 100 further includes an antenna 110 that is connected to the PA 108. The baseband processing unit 104 includes digital signal processor (DSP) 112, a system bus 114, a digital pre-distorter (DPD) 116, an external direct memory access system (DMA) 118, a system memory 120, an event control block 122, and a first antenna interface 124. The RFIC 106 includes a second antenna interface 126, a digital-to-analog converter (DAC) 128, an analog-to-digital converter (ADC) 130, and a mixer 132.
The DSP 112 performs logical and mathematical operations on digital data to generate a series of digital data samples. The series of digital data samples includes information that is to be transmitted over the air to other devices. The DPD 116, the DMA 118, and the system memory 120 are connected to the DSP 112 by way of the system bus 114. The series of digital data samples is provided to the DPD 116 by way of the system bus 114. When the PA 108 operates at a high efficiency, linearity of the PA 108 is adversely affected as the PA 108 reaches a saturation point and generates a non-linear response.
The DPD 116 counters the non-linear response of the PA 108 by pre-distorting the series of digital data samples. The DPD 116 generates a series of pre-distorted samples based on the series of digital data samples. The pre-distorted samples, when provided as input to the PA 108, generate an output that is linear with respect to the digital data samples. The pre-distorted samples are provided to the DMA 118 for storage in the system memory 120.
The first antenna interface 124 is connected to the DPD 116 for receiving the series of pre-distorted samples. The second antenna interface 126 receives the series of pre-distorted samples from the first antenna interface 124. The DAC 128 and the ADC 130 are connected between the second antenna interface 126 and the mixer 132. The DAC 128 receives the pre-distorted samples from the second antenna interface 126 and generates an analog signal. The mixer 132 receives the analog signal from the DAC 128 and up-converts it for generating an RF signal.
The PA 108 is connected to the mixer 132 for receiving the RF signal and converting it to a high-power RF signal. The antenna 110 is connected to the PA 108 for receiving and then transmitting the high-power RF signal. The PA 108 sends the high-power RF signal back to the mixer 132 for down-converting. The mixer 132 generates an analog feedback signal based on the high-power RF signal. The analog feedback signal is provided to the ADC 130 for generating a digital feedback signal, which is provided to the second antenna interface 126. The second antenna interface 126 provides the digital feedback signal to the first antenna interface 124, which provides it to the system memory 120 by way of the DMA 118.
The system memory 120 stores the series of pre-distorted samples and the digital feedback signal. However, the feedback path from the PA 108 to the system memory 120 introduces a delay, and hence, the digital feedback signal arrives at the system memory 120 after the delay. Generally, the delay in the feedback path is estimated by calculating a correlation between the series of pre-distorted samples and the digital feedback signal. The correlation determines the extent of interdependence between the pre-distorted samples and the digital feedback signal.
In some cases, the delay is not an integral multiple of the time period of a digital data sample. The DSP 112 correlates the digital feedback signal and the pre-distorted samples to determine integral and fractional parts of the delay and calculate an estimated delay. The estimated delay is used to align the pre-distorted samples and the digital feedback signal. Correlation is a computationally intensive task and thus takes a lot of computing cycles, which degrades DSP performance. Further, the number of computing cycles required for correlation is dependent on the number of antennas, and hence, further increases for multiple-input multiple-output (MIMO) systems that use multiple antennas.
Therefore it would be advantageous to have an RF transceiver system for aligning pre-distorted samples and the digital feedback signal more efficiently.